SAE J1752/3_201709

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SAE J1752/3_201709 defines a method for measuring the electromagnetic radiation from an integrated circuit(IC). The IC being evaluated is mounted on an IC test printed circuit board (PCB) that is clamped to a mating port(referred to as a wall port) cut in the top or bottom of a TEM or wideband TEM (GTEM) cell. The test board is not in thecell as in the conventional usage but becomes a part of the cell wall.

Product Details

Published:
09/22/2017
Number of Pages:
16
File Size:
1 file , 3.3 MB
Redline File Size:
2 files , 6.1 MB

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