JEDEC JESD 22-A108C

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A revised method for determining the effects of bias conditions and temperature, over time, on solid state devices is now available. Revision B of A108 includes low temperature operating life (LTOL) and high temperature gate bias (HTGB) stress conditions, revised cool down requirements for high temperature stress, and a procedure to follow if parts are not tested within the allowed time window.

Product Details

Published:
06/01/2005
Number of Pages:
13
File Size:
1 file , 79 KB

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