EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES
standard by JEDEC Solid State Technology Association, 05/01/2004
RECOMMENDED ESD TARGET LEVELS FOR HBM/MM QUALIFICATION
standard by JEDEC Solid State Technology Association, 03/01/2012
METHODS FOR CALCULATING FAILURE RATES IN UNITS OF FITS
standard by JEDEC Solid State Technology Association, 07/01/2001
STANDARD FOR DEFINITION OF THE SSTV16859 2.5 V, 13-BIT TO 26-BIT SSTL_2 REGISTERED BUFFER FOR STACKED DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2003
CONDITIONS FOR MEASUREMENT OF DIODE STATIC PARAMETERS
standard by JEDEC Solid State Technology Association, 12/01/1992
TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES
standard by JEDEC Solid State Technology Association, 10/01/2016
System Level ESD Part II: Implementation of Effective ESD Robust Designs
standard by JEDEC Solid State Technology Association, 09/01/2019
NAND Flash Interface Interopability
standard by JEDEC Solid State Technology Association, 06/01/2019
Universal Flash Storage Host Controller Interface (UFSHCI), Unified Memory Extension
standard by JEDEC Solid State Technology Association, 03/01/2016
Addendum No. 1 to JESD209-4 – Low Power Double Data Rate 4 (LPDDR4)
Amendment by JEDEC Solid State Technology Association, 01/01/2017
