ADDENDUM No. 4 to JESD8 – CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 11/01/1993
Byte Addressable Energy Backed Interface
standard by JEDEC Solid State Technology Association, 09/01/2019
TEST METHOD FOR THE MEASUREMENT OF MOISTURE DIFFUSIVITY AND WATER SOLUBILITY IN ORGANIC MATERIALS USED IN INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 01/01/2008
Inspection Criteria for Microelectronic Packages and Covers
standard by JEDEC Solid State Technology Association, 05/01/2011
DESCRIPTION OF 5 V BUS SWITCH WITH TTL-COMPATIBLE CONTROL INPUTS
standard by JEDEC Solid State Technology Association, 06/01/1999
MEASUREMENT OF TRANSISTOR NOISE FIGURE AT MF, HF, AND VHF
standard by JEDEC Solid State Technology Association, 11/01/1981
GUIDELINE FOR CHARACTERIZING SOLDER BUMP ELECTROMIGRATION UNDER CONSTANT CURRENT AND TEMPERATURE STRESS
standard by JEDEC Solid State Technology Association, 01/01/2008
STANDARD TEST AND PROGRAMMING LANGUAGE (STAPL)
standard by JEDEC Solid State Technology Association, 08/01/1999
INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD – ELECTRICAL TEST METHOD (SINGLE SEMICONDUCTOR DEVICE)
standard by JEDEC Solid State Technology Association, 12/01/1995
IPC/JEDEC-9702: MONOTONIC BEND CHARACTERIZATION OF BOARD-LEVEL INTERCONNECTS (IPC/JEDEC-9702)
standard by JEDEC Solid State Technology Association, 06/01/2004
