DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONS
standard by JEDEC Solid State Technology Association, 12/01/2010
GUIDELINES FOR PACKING AND LABELING OF INTEGRATED CIRCUITS IN UNIT CONTAINER PACKING
standard by JEDEC Solid State Technology Association, 02/01/2006
Universal Flash Storage (UFS)
standard by JEDEC Solid State Technology Association, 09/01/2013
Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devices
standard by JEDEC Solid State Technology Association, 08/01/2012
THERMAL RESISTANCE MEASUREMENTS OF CONDUCTION COOLED POWER TRANSISTORS
standard by JEDEC Solid State Technology Association, 10/01/1975
TWO-RESISTOR COMPACT THERMAL MODEL GUIDELINE
standard by JEDEC Solid State Technology Association, 07/01/2008
RECOMMENDED PRACTICE FOR MEASUREMENT OF TRANSISTOR LEAD TEMPERATURE
standard by JEDEC Solid State Technology Association, 06/01/2004
STANDARD FOR DEFINITION OF CUA845 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 01/01/2007
ADDENDUM No. 5 to JESD12 – DESIGN FOR TESTABILITY GUIDELINES
Amendment by JEDEC Solid State Technology Association, 08/01/1988
Low Power Double Data Rate 3 SDRAM (LPDDR3)
standard by JEDEC Solid State Technology Association, 08/01/2015
