ADDENDUM No. 2 to JESD8 – STANDARD FOR OPERATING VOLTAGES AND INTERFACE LEVELS FOR LOW VOLTAGE EMITTER-COUPLED LOGIC (ECL) INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 03/01/1993
EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, STANDARD CAPACITY
standard by JEDEC Solid State Technology Association, 07/01/2007
FOUNDRY PROCESS QUALIFICATION GUIDELINES – PRODUCT LEVEL (Wafer Fabrication Manufacturing Sites)
standard by JEDEC Solid State Technology Association, 09/01/2018
DEFINITION OF THE SSTUB32868 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 10/01/2006
THERMAL IMPEDANCE MEASUREMENT FOR INSULATED GATE BIPOLAR TRANSISTORS – (Delta VCE(on) Method)
Amendment by JEDEC Solid State Technology Association, 06/01/2004
JOINT IPC/JEDEC STANDARD FOR HANDLING, PACKING, SHIPPING AND USE OF MOISTURE/REFLOW SENSITIVE SURFACE-MOUNT DEVICES
standard by JEDEC Solid State Technology Association, 01/01/2007
Addendum 1 to JESD96A – INTEROPERABILITY AND COMPLIANCE TECHNICAL REQUIREMENTS FOR JEDEC STANDARD JESD96A – RECOMMENDED PRACTICE FOR USE WITH IEEE 802.11N
Amendment by JEDEC Solid State Technology Association, 01/01/2007
STANDARD DESCRIPTION OF 1.2 V CMOS LOGIC DEVICES (NORMAL RANGE OPERATION)
standard by JEDEC Solid State Technology Association, 06/01/2001
Universal Flash Storage Host Controller Interface (UFSHCI)
standard by JEDEC Solid State Technology Association, 03/01/2016
TEST METHODS TO CHARACTERIZE VOIDING IN PRE-SMT BALL GRID ARRAY PACKAGES
standard by JEDEC Solid State Technology Association, 09/01/2010
