STANDARD TEST METHOD UTILIZING X-RAY FLUORESCENCE (XRF) FOR ANALYZING COMPONENT FINISHES AND SOLDER ALLOYS TO DETERMINE TIN (Sn) – LEAD (Pb) CONTENT
standard by JEDEC Solid State Technology Association, 03/01/2010
Low Power Double Data Rate 2 (LPDDR2)
standard by JEDEC Solid State Technology Association, 06/01/2013
HIGHLY ACCELERATED TEMPERATURE AND HUMIDITY STRESS TEST (HAST)
standard by JEDEC Solid State Technology Association, 01/01/2009
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2011
DESCRIPTION OF 1.8 V CMOS LOGIC DEVICES
standard by JEDEC Solid State Technology Association, 04/01/2000
SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD
standard by JEDEC Solid State Technology Association, 09/01/2010
REQUIREMENTS FOR MICROELECTRONIC SCREENING AND TEST OPTIMIZATION
standard by JEDEC Solid State Technology Association, 10/01/2006
ADDENDUM No. 5 to JESD8 – 2.5 V 0.2 V (NORMAL RANGE), AND 1.8 V TO 2.7 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUIT
standard by JEDEC Solid State Technology Association, 09/01/2007
THERMAL TEST ENVIRONMENT MODIFICATIONS FOR MULTICHIP PACKAGES
standard by JEDEC Solid State Technology Association, 07/01/2008
EMBEDDED MULTIMEDIACARD (e*MMC)MECHANICAL STANDARD
standard by JEDEC Solid State Technology Association, 12/01/2007
