JEDEC JESD51-12

GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATION
standard by JEDEC Solid State Technology Association, 05/01/2005

JEDEC JESD22-A114F

ELECTROSTATIC DISCHARGE (ESD) SENSITIVITY TESTING HUMAN BODY MODEL (HBM)
standard by JEDEC Solid State Technology Association, 12/01/2008

JEDEC JESD25 (R2002)

MEASUREMENT OF SMALL-SIGNAL TRANSISTOR SCATTERING PARAMETERS
standard by JEDEC Solid State Technology Association, 11/01/1972

JEDEC JEP 148A

RELIABILITY QUALIFICATION OF SEMICONDUCTOR DEVICES BASED ON PHYSICS OF FAILURE RISK AND OPPORTUNITY ASSESSMENT
standard by JEDEC Solid State Technology Association, 12/01/2008

JEDEC JESD75-5

SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
standard by JEDEC Solid State Technology Association, 07/01/2004

JEDEC JESD51-4A

Thermal Test Chip Guideline (Wire Bond Type Chip)
standard by JEDEC Solid State Technology Association, 06/01/2019

JEDEC JESD49A (R2009)

PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD)
standard by JEDEC Solid State Technology Association, 09/01/2005

JEDEC JESD22-A102C (R2008)

ACCELERATED MOISTURE RESISTANCE – UNBIASED AUTOCLAVE
standard by JEDEC Solid State Technology Association, 12/01/2000

JEDEC JESD8-33

.05 Low Voltage Swing Terminated Logic (LVSTL05)
standard by JEDEC Solid State Technology Association, 06/01/2019

JEDEC JESD 12-4

ADDENDUM No. 4 to JESD12 – METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITS
Amendment by JEDEC Solid State Technology Association, 04/01/1987