JEDEC JEP163
SELECTION OF BURN-IN/LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2015
- Comments Off on JEDEC JEP163
- JEDEC
SELECTION OF BURN-IN/LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2015
CERAMIC PACKAGE SPECIFICATION FOR MICROELECTRONIC PACKAGES
standard by JEDEC Solid State Technology Association, 08/01/1993
DEFINITION OF EXTERNAL CLEARANCE AND CREEPAGE DISTANCES OF DISCRETE SEMICONDUCTOR PACKAGES FOR THYRISTORS AND RECTIFIER DIODES
standard by JEDEC Solid State Technology Association, 11/01/1983
RECOMMENDED CHARACTERIZATION OF MOS SHIFT REGISTERS
standard by JEDEC Solid State Technology Association, 11/01/1972
Universal Flash Storage (UFS)
standard by JEDEC Solid State Technology Association, 03/01/2016
ELECTRICAL PARAMETERS ASSESSMENT
standard by JEDEC Solid State Technology Association, 10/01/2009
DEFINITION OF THE SSTV32852 2.5 V 24-BIT TO 48-BIT SSTL_2 REGISTERED BUFFER FOR 1U STACKED DDR DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2004
Handling, Packing, Shipping, and Use of Moisture/Reflow Sensitive Surface-Mount Devices
standard by JEDEC Solid State Technology Association, 04/01/2018
SEMICONDUCTOR POWER CONTROL MODULES
standard by JEDEC Solid State Technology Association, 11/01/1986
GDDR5 SGRAM
standard by JEDEC Solid State Technology Association, 09/01/2009