JEDEC JESD82-19A
DEFINITION OF THE SSTUA32S865 AND SSTUA32D865 28-BIT 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
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DEFINITION OF THE SSTUA32S865 AND SSTUA32D865 28-BIT 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
FBDIMM SPECIFICATION: HIGH SPEED DIFFERENTIAL PTP LINK AT 1.5 V
standard by JEDEC Solid State Technology Association, 03/01/2008
STANDARD TEST STRUCTURE FOR RELIABILITY ASSESSMENT OF AlCu METALLIZATIONS WITH BARRIER MATERIALS
standard by JEDEC Solid State Technology Association, 07/01/2001
STANDARD FOR DEFINITION OF CUA878 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 11/01/2005
COMPACT THERMAL MODEL OVERVIEW
standard by JEDEC Solid State Technology Association, 10/01/2008
System Level ESD: Part II: Implementation of Effective ESD Robust Designs
standard by JEDEC Solid State Technology Association, 01/01/2013
INFORMATION REQUIREMENTS FOR THE QUALIFICATION OF SILICON DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2007
DDR2 SPD INTERPRETATION OF TEMPERATURE RANGE AND (SELF-) REFRESH OPERATION
standard by JEDEC Solid State Technology Association, 06/01/2006
STANDARD FOR SELENIUM SURGE SUPPRESSORS
standard by JEDEC Solid State Technology Association, 11/01/1973
Lead Integrity
standard by JEDEC Solid State Technology Association, 07/01/2011