JEDEC JEP174
UNDERSTANDING ELECTRICAL OVERSTRESS – EOS
standard by JEDEC Solid State Technology Association, 09/01/2016
- Comments Off on JEDEC JEP174
- JEDEC
UNDERSTANDING ELECTRICAL OVERSTRESS – EOS
standard by JEDEC Solid State Technology Association, 09/01/2016
GENERAL REQUIREMENTS FOR DISTRIBUTORS OF COMMERCIAL AND MILITARY SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 09/01/2012
STANDARD FOR DESCRIPTION OF 3.3 V NFET BUS SWITCH DEVICES
standard by JEDEC Solid State Technology Association, 08/01/2001
DELPHI COMPACT THERMAL MODEL GUIDELINE
standard by JEDEC Solid State Technology Association, 10/01/2008
1.0 V +/- 0.1 V (NORMAL RANGE) AND 0.7 V – 1.1 V (WIDE RANGE) POWER SUPPLY VOLTAGE AND INTERFACE STANDARD FOR NONTERMINATED DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2007
DEFINITION OF THE SSTU32866 1.8 V CONFIGURABLE REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 05/01/2007
USER GUIDELINES FOR IR THERMAL IMAGING DETERMINATION OF DIE TEMPERATURE
standard by JEDEC Solid State Technology Association, 09/01/1999
SERIAL INTERFACE FOR DATA CONVERTERS
standard by JEDEC Solid State Technology Association, 04/01/2008
RANGES AND CONDITIONS FOR SPECIFYING BETA FOR LOW POWER, AUDIO FREQUENCY TRANSISTORS FOR ENTERTAINMENT SERVICE
standard by JEDEC Solid State Technology Association, 01/01/1965
LOW POWER DOUBLE DATA RATE 2 (LPDDR2)
standard by JEDEC Solid State Technology Association, 12/01/2010