JEDEC JESD82-2
STANDARD FOR DESCRIPTION OF A 3.3 V, 18-BIT, LVTTL I/O REGISTER FOR PC133 REGISTERED DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 07/01/2001
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STANDARD FOR DESCRIPTION OF A 3.3 V, 18-BIT, LVTTL I/O REGISTER FOR PC133 REGISTERED DIMM APPLICATIONS
standard by JEDEC Solid State Technology Association, 07/01/2001
SOLDER BALL SHEAR
standard by JEDEC Solid State Technology Association, 05/01/2014
PRODUCT DISCONTINUANCE
standard by JEDEC Solid State Technology Association, 12/01/2011
UNDERSTANDING ELECTRICAL OVERSTRESS – EOS
standard by JEDEC Solid State Technology Association, 09/01/2016
GENERAL REQUIREMENTS FOR DISTRIBUTORS OF COMMERCIAL AND MILITARY SEMICONDUCTOR DEVICES
standard by JEDEC Solid State Technology Association, 09/01/2012
STANDARD FOR DESCRIPTION OF 3.3 V NFET BUS SWITCH DEVICES
standard by JEDEC Solid State Technology Association, 08/01/2001
DELPHI COMPACT THERMAL MODEL GUIDELINE
standard by JEDEC Solid State Technology Association, 10/01/2008
STUB SERIES TERMINATED LOGIC FOR 1.8 V (SSTL_18)
standard by JEDEC Solid State Technology Association, 09/01/2003
ADDENDUM No. 2 to JESD35 – TEST CRITERIA FOR THE WAFER-LEVEL TESTING OF THIN DIELECTRICS
standard by JEDEC Solid State Technology Association, 02/01/1996
FAILURE-MECHANISM-DRIVEN RELIABILITY MONITORING
standard by JEDEC Solid State Technology Association, 02/01/2007