ADDENDUM No. 8 to JESD8 – STUB SERIES TERMINATED LOGIC FOR 3.3 VOLTS (SSTL_3) A 3.3 V VOLTAGE BASED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 08/01/1996
INFORMATION REQUIREMENTS FOR THE QUALIFICATION OF SILICON DEVICES
standard by JEDEC Solid State Technology Association, 11/01/2017
Power Cycling
standard by JEDEC Solid State Technology Association, 06/01/2016
Alpha Radiation Measurement in Electronic Materials
standard by JEDEC Solid State Technology Association, 05/01/2011
DOUBLE DATA RATE (DDR) SDRAM SPECIFICATION
standard by JEDEC Solid State Technology Association, 02/01/2008
ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST
standard by JEDEC Solid State Technology Association, 11/01/2018
SOLDER BALL PULL
standard by JEDEC Solid State Technology Association, 05/01/2007
Low Power Double Data Rate 4 (LPDDR4)
standard by JEDEC Solid State Technology Association, 02/01/2017
FBDIMM: ADVANCED MEMORY BUFFER (AMB)
standard by JEDEC Solid State Technology Association, 03/01/2009
Material Composition Declaration for Electronic Products
standard by JEDEC Solid State Technology Association, 04/01/2009
