JEDEC JEP175

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The intended use of this document is for the validation and debug of DDR4 based designs. This document contains protocol checks, sometimes referred to as memory access rules or protocol violations. This document contains a list of checks that can be used during the verification or debug stages of development to check that accesses to a DDR4 DRAM adhere to JESD79-4B. These checks are derived from JESD79-4B. Item 31509.

Product Details

Published:
07/01/2017
Number of Pages:
16
File Size:
1 file , 100 KB

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