JEDEC JESD51-14
- Comments Off on JEDEC JESD51-14
- JEDEC
Click here to purchase
This document specifies a test method (referred to herein as “Transient Dual Interface Measurement”) to determine the conductive thermal resistance “Junction-to-Case” R0JC (0JC) of semiconductor devices with a heat flow through a single path, i.e., semiconductor devices with a high conductive heat flow path from the die surface that is heated to a package case surface that can be cooled by contacting it to an external heat sink.
Product Details
- Published:
- 11/01/2010
- File Size:
- 1 file , 670 KB
